library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity led_blinker is
    port(
        clk   : in  std_logic;   -- 10 MHz clock
--reset : in  std_logic;   -- active-high synchronous reset
        led   : out std_logic    -- LED output (connect to Basys 3 LED)
    );
end entity;

architecture rtl of led_blinker is
    -- 10 MHz clock → 10,000,000 cycles per second
    constant CLOCK_FREQ : integer := 10_000_000;
    constant BLINK_RATE : integer := 1;  -- 1 Hz (1 second period)
    constant HALF_PERIOD : integer := CLOCK_FREQ / (2 * BLINK_RATE);

    signal counter : integer range 0 to HALF_PERIOD := 0;
    signal led_state : std_logic := '0';
begin

    process(clk)
    begin
        if rising_edge(clk) then

                if counter = HALF_PERIOD then
                    counter   <= 0;
                    led_state <= not led_state;  -- toggle every 0.5s
                else
                    counter <= counter + 1;
                end if;

        end if;
    end process;

    led <= led_state;

end architecture;
